发明名称 INSTRUCTION FETCHING SYSTEM
摘要 PURPOSE:To improve a processing speed by executing macro-instruction fetching processing in accordance with the validity/invalidity of a flag indicating whether a macro-instruction effective for an instruction buffer exists or not at the time of generating a microinstruction for fetching the macro-instruction. CONSTITUTION:The titled system is provided with a register 11 for counting up a macro-instruction address every '+1' in order to prepare the succeeding macro-instruction at the time of ending one macro-instruction processing, a flag forming part 12 for forming a flag 6 indicating whether the contents of the instruction buffer 7 are valid or invalid and deciding whether a main storage device 2 is to be accessed by hardware in accordance with the contents of the flag 6 and an AND 13 for finding out an AND condition between an invert signal of the flag 6 generated by the flag forming part 12 and the ON output of a register 6 in which the macro-instruction is set up and sending a memory request signal 2. Consequently, load to farmware can be reduced with simple hardware constitution and its processing can be speed up.
申请公布号 JPS63149735(A) 申请公布日期 1988.06.22
申请号 JP19860298041 申请日期 1986.12.15
申请人 FUJITSU LTD 发明人 KAMISAKA YUJI;MURATA TAKESHI;NODA TAKAHITO;ABO KENICHI;TAKEI MASAYOSHI;NONOMURA KAZUYASU;NISHIMACHI RIYOUICHI;SAKURAI YASUTOMO
分类号 G06F12/08;G06F9/22;G06F9/26;G06F9/38;G06F12/10 主分类号 G06F12/08
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