| 摘要 |
A material such as boron nitride is conformally deposited and then patterned to form adherent portions (22) on the sidewalls of high-aspect-ratio vias (18) formed in a dielectric layer (16) of a CMOS device. A conductive material such as tungsten is then selectively deposited in the vias on the boron nitride and on silicon or silicide at the via bottoms. In some cases, the deposition of tungsten is controlled to fill the vias thereby leaving an advantageous substantially planar surface for subsequent metallization. |
