发明名称 DATA TRANSFER SYSTEM
摘要 PURPOSE:To improve the throughput of a data transfer system using a processor by controlling the occupying time of a bus for each input/output device and omitting the bus arbitrating time. CONSTITUTION:A time designating circuit 4c designates a bus occupying time for each I/O controller 4 and a time monitor circuit 4d monitors the actual data transfer time. When the time counted by a monitor circuit 4d is equal to the value indicated by a designating circuit 4c after the transfer of data is started, a bus 2 is opened for the next request. As a result, an input/output device 5 with which the transfer of data is requested at a comparatively high speed can transfer data without opening the bus 2. Thus the bus arbitrating time is omitted. As a result, the overall throughput is improved for a data transfer system.
申请公布号 JPS63147251(A) 申请公布日期 1988.06.20
申请号 JP19860295534 申请日期 1986.12.10
申请人 FUJITSU LTD 发明人 AKITA JUICHI
分类号 G06F13/372;G06F13/20 主分类号 G06F13/372
代理机构 代理人
主权项
地址
您可能感兴趣的专利