发明名称 ELEMENTAL OPERATOR, ESPECIALLY FOR A CASCADE-TYPE MULTIPLIER
摘要 1. An elementary operator for combining a first digital input signal of at least n bits (SX, X) with a second digital input signal comprising a first and a second bit (Y2j-1 , Y2j ) in order to obtain an output digital signal with an output carry bit, said operator comprising : - computing means (108) for complementing (~X) the first signal in order to offset it one step to the left (2X) while losing the high value bit and to complement (~2~X) this first offset signal ; - a first exclusive OR-gate (112) in order to receive the first and the second bits (Y2j-1 , Y2j ) of the second digital signal and to apply a first function bit ; - an n bit adder (110) ; - a first register (103) for storing the first signal and for applying it to the computing means (108) for the first signal, characterized in that it comprises : - a third input digital signal of n bits (RIj-1 ) ; - a first 4 to 1 multiplexer (109) to select a signal between the first signal, the first signal in an inverted form, the first signal in an offset form, and the first signal in an offset and inverted form, under the control of the third bit of the third signal and of the first function bit, and to supply the n high value bits of the selected signal ; - a second exclusive OR-gate (115) to receive the second and the third bits of the third signal and to supply a second function bit ; - a second 2 to 1 multiplexer (111) to select a signal between the second signal and the sum supplied by the adder under the control of either of the two function bits and to supply the fourth signal ; - in that the second digital furthermore comprises a third bit (Y2j+1 ) and an input carry bit, in that the adder is adapted to cause the addition of the third digital signal and of the signal selected by the first multiplexer with one input carry bit and to supply the sum of these signals and the output carry bit - and in that in order to store the first signal and the first register (103) supplies a fifth digital output signal comprising the n high value bits of the first signal.
申请公布号 DE3376589(D1) 申请公布日期 1988.06.16
申请号 DE19833376589 申请日期 1983.12.16
申请人 THOMSON-CSF 发明人 MULLER, BERNARD-PIERRE;CHARLEC, JEAN-PAUL
分类号 G06F7/52;(IPC1-7):G06F7/52 主分类号 G06F7/52
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