发明名称 FORMATION OF SEMICONDUCTOR INTERELEMENT ISOLATION REGION
摘要 PURPOSE:To eliminate the bite of an oxide film into an active element region and to contrive an increase in density by a method wherein a selective thermal oxidation is performed using a heat-resisting mask pattern formed by etching selectively a heat-resisting coat using an Si oxide film as a mask. CONSTITUTION:A four-layer film consisting of an Si oxide film 2, an Si nitride film 3, a poly Si layer 4 and an Si nitride film 5 is formed on an Si substrate 1. The nitride film 5 is patterned, the nitride film 5 on a region, where the formation of an active element is expected, is removed and thereafter, when a selective thermal oxidation is performed, part of the Si layer 4 is converted into an Si oxide film 7. Then, after the nitride film 5 and the Si layer 4 are removed, an impurity (impurity ions) 8 of the same conductivity type as that of the substrate 1 is ion-implanted in the substrate using the oxide film 7 as a mask to form impurity implanted regions 9. The oxide film 7 is etched away and when a thermal oxidation is anew performed using the oxide film 3 as a mask, a thick field oxide film 10 and an impurity diffused region 11 can be simultaneously formed. After that, the Si nitride film mask 3 and the oxide film 2 are removed and when a normal production process is executed, a desired MOS transistor can be obtained.
申请公布号 JPS63144544(A) 申请公布日期 1988.06.16
申请号 JP19860293813 申请日期 1986.12.09
申请人 NEC CORP 发明人 NAKAMURA KUNIO
分类号 H01L21/316;H01L21/76 主分类号 H01L21/316
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