发明名称 METHOD AND APPARATUS FOR DETECTING EXPECTED BIT PATTERN IN SUCCESSIVE BIT STREAM
摘要 The invention relates to the fast detection of a predetermined pattern of n bits embedded in a serial bit stream (14). The n bits are adjacent or regularly distributed over the stream (as in a Time Division Multiplexed Signal), and form a unique word (16) which may in particular be used as a synchronization pattern, the detection of which allows to conclude that a synchronization status has been reached within the signal detected at a reception node. The method consists in detecting first a synchronization root, which is a subset (18) of n' consecutive bits of the unique word. A non-detection of the unique word can be evidenced very early and accordingly, a substantial amount of time can be saved in the detection, since in the average, it is not necessary to go through n comparison steps to conclude a non-detection of the unique word.
申请公布号 JPS63142742(A) 申请公布日期 1988.06.15
申请号 JP19870261919 申请日期 1987.10.19
申请人 INTERNATL BUSINESS MACH CORP <IBM> 发明人 JIYAKESU ANDORE BESHIRE
分类号 H04L29/02;G06F7/02;G06F17/30;H03M7/40;H04J3/06;H04L7/08;H04L13/18;H04L29/06 主分类号 H04L29/02
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