发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT
摘要 PURPOSE:To prevent a malfunction and a reduction in the operating speed by a method wherein a diffused region whose polarity is opposite to a diffused layer in relation to a P-diffused layer or an N-diffused layer of a source or a drain is formed in a part inside a source region or a drain region. CONSTITUTION:A diode 40 is composed of a P-type semiconductor 31 and an N-type semiconductor 30; a diode 42 is composed of an N-type semiconductor 22 and a P-type semiconductor 23. If a circuit is constructed in such a way that switches 38 and 44 are closed when a high level signal is injected into an input terminal 35 of a P-channel MOSFET 39 and both n-channel MOSFET's 39, 43 are in a high-impedance state while the switches are opened in other cases, a bias at the diodes 40, 42 is reversed in the high-impedance state and the output impedance at an input terminal 41 becomes very high. In addition, the parasitic capacitance is only the diffusion capacitance of the diodes 40, 42 and is small as compared with the parasitic capacitance of drains at the MOSFET's 39, 43. Accordingly, the output parasitic capacitance of the MOSFET's in an inoperative state is reduced, and it is possible to prevent a malfunction or the like of a semiconductor device.
申请公布号 JPS63142679(A) 申请公布日期 1988.06.15
申请号 JP19860290030 申请日期 1986.12.04
申请人 NEC CORP 发明人 KOMAKI YURIKO;IMAMURA KAZUO
分类号 H01L27/088;H01L21/8234;H01L27/08;H01L29/78 主分类号 H01L27/088
代理机构 代理人
主权项
地址