| 发明名称 |
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| 摘要 |
PURPOSE:To improve withstand voltage capability and to enlarge capacitance by a method wherein regions are provided to encircle capacitance generating regions between a semiconductor layer formed on a semiconductor substrate surface and the capacitance generating regions. CONSTITUTION:An n type layer 22 is imbedded in a p type Si semiconductor substrate 21 on which another n type semiconductor layer 23 is formed by the vapor growth method. next, a p type isolating layers are separatedly formed by diffusion. After this, p<-> regions 26 and 25 are formed to encircle capacitance regions. This process is followed by the simultaneous formation of p type diffused layers 29 and regions 27 and 28 for capacitance creation. Then n<+> type diffused layers 34 and regions 30-33 are simultaneously formed. The formation of an insulating film 25' follows. Provision of a p<-> region 26 surrounding the diffused capacitance layer 29 makes the generation of CE leak and of poor withstand voltage capability difficult. |
| 申请公布号 |
JPS6329830(B2) |
申请公布日期 |
1988.06.15 |
| 申请号 |
JP19800186393 |
申请日期 |
1980.12.26 |
| 申请人 |
MATSUSHITA ELECTRIC IND CO LTD |
发明人 |
TAKEMOTO TOYOKI;YAMADA HARUYASU;FUJITA TSUTOMU;YONEDA TADANAKA |
| 分类号 |
H01L27/04;H01L21/331;H01L21/822;H01L21/8222;H01L21/8226;H01L27/02;H01L27/06;H01L27/082;H01L29/73 |
主分类号 |
H01L27/04 |
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