| 摘要 |
PURPOSE:To shorten the number of steps and to improve a processing speed by combining a state selecting field, an arithmetic field and an arithmetic holding register to execute the operation of a microinstruction. CONSTITUTION:When '-1' operation is previously set up in an arithmetic holding register 9, '1' is added to the value of a register B when the value of a register A is other than a negative value and '1' is subtracted from the value of the register B when the value of the register A is negative, a flag computing instruction is executed in the n-th step and the contents of the register A are set up in a flag register 11. In the (n+1)th step, a select operation instruction 5 is executed. When '+1' operation is specified by an operation field 5b, '-1' is set up in the register 9. When a state selection field 5b specifies the detection of a negative operation result, the register 9 is specified when the operated result is negative in the n-th step, and B=B-1 is executed. When the operated result in the n-th step is not negative, the arithmetic field is specified to execute B=B+1.
|
