发明名称 LAYOUT METHOD FOR SEMICONDUCTOR INTEGRATED CIRCUIT
摘要 PURPOSE:To extend the noise margin of device itself by supplying a control- signal input circuit with a stable power supply while forming a power supply to an internal logic circuit section in another system by directly feeding the power supply to the control-signal input circuit through a power line. CONSTITUTION:Power lines 8, 9 fed to a control-signal input circuit 3 are connected to a VCC terminal 6 and a GND terminal 7 in shortest size while control terminals and input protective circuit 10 are arranged brought near to these VCC terminal 6 and GND terminal 7, and a line after supply to the control-signal input circuit 3 is used or another system line is employed regarding a power supply to an internal logic circuit section 1. The control-signal input circuit can be supplied with the further stable power supply while resistance to noises can be increased.
申请公布号 JPS63142846(A) 申请公布日期 1988.06.15
申请号 JP19860290717 申请日期 1986.12.05
申请人 MITSUBISHI ELECTRIC CORP 发明人 NAKAJIMA TOYOKATSU
分类号 H01L21/822;H01L27/02;H01L27/04 主分类号 H01L21/822
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