Systolic super summation device

摘要

A cellular architecture for a systolic super summer for high throughput performance of repeated sums of floating-point numbers. The summer receives pipelined inputs of streams of summands, converts the floating-point summands into a fixed-point form by a sieve-like pipelined cellular network, and sums the emerging fixed-point numbers in a corresponding network of extremely long accumulators. The throughput per unit area of the hardware approaches that of a tree network, but without the long wires and signal propagation that are intrinsic to tree networks.