发明名称 |
Digital computer for implementing event driven simulation algorithm |
摘要 |
A computer for implementing an event driven algorithm which is used in conjunction with a master computer is disclosed. The computer includes a plurality of processors coupled in a ring arrangement each of which is microprogrammable. Each processor includes a memory and a memory address generator. The generator can generate addresses based on a combination of signals from both the microcode and signals on the data bus.
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申请公布号 |
US4751637(A) |
申请公布日期 |
1988.06.14 |
申请号 |
US19840594533 |
申请日期 |
1984.03.28 |
申请人 |
DAISY SYSTEMS CORPORATION |
发明人 |
CATLIN, GARY M. |
分类号 |
G06F11/25;G06F13/40;G06F15/82;G06F17/50;(IPC1-7):G06F15/16 |
主分类号 |
G06F11/25 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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