发明名称 Integrated circuit probe parallelism establishing method and apparatus
摘要 A probe mount carries a probe with test points having ends in a test point plane. The probe mount is supported at three spaced apart locations by respective first, second and third supports, each adjacent to a respective one of the test points. These probe supports permit independent shifting of each of the three locations along respective parallel lines. As these locations are shifted relative to one another, the test point plane is tilted until it is parallel to a second plane containing the surface of an integrated circuit wafer to be probed. A test surface is positioned in the second plane and advanced toward the probe. As the test points contact the test surface, the test point plane is tilted. Microprocessor controlled stepper motors may be used to tilt the test point plane and to shift the test surface.
申请公布号 US4751457(A) 申请公布日期 1988.06.14
申请号 US19860905376 申请日期 1986.09.08
申请人 TEKTRONIX, INC. 发明人 VEENENDAAL, CORNELIS T.
分类号 G01R1/06;G01B7/14;G01B7/31;G01R1/073;G01R31/28;G05B19/402;H01L21/66;(IPC1-7):G01R31/02;G01B3/38 主分类号 G01R1/06
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