| 摘要 |
The system has a data transmitter coupled to receivers by true and complement data signal lines. The receivers may also send return data signals to the transmitter in sychronism with received signals. The transmitter uses the four possible binary states represented by the two bits of the true and complement lines. A transition is made to a zero state represented as 01, or to an one state as 10, when data is to be transmitted. The data receivers detect the bit state to recover a bit clock signal, and the one and zero status to recover and NRZ data signal.
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