| 摘要 |
PURPOSE:To accelerate a CPU processing operation and to prevent the unauthorized access of a program from being performed by using a specific pattern, by enabling the pattern of an instruction to be prefetched to be set freely in an instruction analysis memory part. CONSTITUTION:An address signal outputted for the read of the next execution instruction from a CPU is latched by an address analysis memory part 2 in an instruction prefetching device 15, then is analyzed, and it is checked whether the said instruction already exists in a prefetch instruction buffer 5. When the instruction exists by prefetching, the instruction in the buffer 5 is immediately sent to the CPU1. Meanwhile, when no instruction exists, the instruction read out from an instruction memory device to the CPU1 by the address signal is latched by the instruction analysis memory part 3 in the instruction prefetching device 15, and it is checked whether the instruction is a specific instruction having a specific pattern or not.
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