| 摘要 |
PURPOSE:To minimize the superimpose of a normal action and a refresh action and to prevent a drop in the performance of the normal action due to the refresh action by delaying the refresh action of a module in operation and refreshing an inoperable module by prescribed times plus the number of delaying times. CONSTITUTION:A time control means 1 periodically generates a trigger signal, and a module monitor means 4 monitors actions every memory module. A 1st counter means 13 sets the number of times refreshing the inoperable module, while a 2nd counter means 36 counts up a set valuer according to a refresh instruction for the operating module. An adder circuit 28 adds the readings of the 1st and 2nd counter means, and a 1st activation means 6 activates the action to refresh the inoperable module by the added number of times. A 2nd activation means 7 activates the refreshing action only once at the end of the action of the operating module.
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