| 摘要 |
PURPOSE:To speed up processing speed by using data reading operation for an existing mask signal, data signal and preceding data signal as it is. CONSTITUTION:Under a usual data writing mode, by a low writing mode instructing signal held at a latch circuit 2, a switch 4 is switched to a lower side, a switch 10 is switched to an upper side, and a data signal D synchronized to a writing command signal WE and held at a latch circuit 3 is written to a memory plane 1. In the condition except the usual data writing mode, first, original writing data are once read from the memory plane 1 by a reading command signal RE, synchronized through a delaying circuit 7 to a reading command signal and held to a latch circuit 6. Continuously, a high writing mode instructing signal (m) and the writing command signal WE are supplied to the memory device. As the result, by synchronizing to the writing command signal WE, a high writing mode instructing signal (m) is held at the latch circuit 3 and the switch 4 is switched to the upper side and the switch 10 is switched to the lower side.
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