| 摘要 |
PURPOSE:To easily control a delaying time at a GHz area by using a strip line to give respectively a prescribed delay time to a digital signal converted with an analog signal, a clock signal and a latching comparator. CONSTITUTION:A strip line 9 adds successively an analog signal Ah sampled by a circuit 2 as Ah3-Ah0 in a prescribed delaying time from a latching comparator 73 of the upper-most bit toward a latching comparator 70 of the lower-most bit and strip lines 101 and 102 add successively clocks phi and -phi, in which a phase is different by 180 deg., as clocks phi3-phi0 from the comparator 73 toward the same 70 and a latch circuit 8. Strip lines 123-121 add digital signal D3-D1 outputted from comparators 73-71 to the latch circuit 8 in a prescribed delaying time and add successively them in a prescribed delaying time from the comparator 73 to the comparator 70. By constituting like this, the delaying time is univocally determined by the geometrical size accuracy of the strip line and the characteristic can be equalized.
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