| 摘要 |
PURPOSE:To enable the ON resistance of transistor to be weakened by a method wherein a selective oxide film is formed only on the drain region at the channel side to form a gate polysilicon layer overlapped with the selective oxide film. CONSTITUTION:A selective oxide film 6 is formed on the channel side of drain region and then a gate polysilicon layer 7 and a gate oxide film 8 are formed to cover the selective oxide film 6 and a channel region. Then, after forming a resist film 15 on the surface of a semiconductor device, N<+> layers 9, 9b are formed on source, drain sides while an N<-> layer 9a working as drain is formed and after forming another resist film 16, P<+> diffused layer 10 is formed and then boron is implanted in the part below the diffused layers 9, 10 to form a P<+> shield layer 11. Through these procedures, an N<-> region 9a can be formed of the selective oxide film 6 in self alignment enabling the width of N<-> region 9a to be optimized while preventing any useless ON resistance from increasing.
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