发明名称 MANUFACTURE OF SEMICONDUCTOR DEVICE
摘要 PURPOSE:To restrain variations of a source resistance while enabling the same to be reduced by a method wherein two layers are formed bordering on a resist pattern generated at an undercut part of a second insulating film. CONSTITUTION:After forming a source region 60A and a drain region 60B as well as performing annealing process, a first insulating film 56 is etched until it is undercut using a second insulating film as a mask. Next, a metallic material 62 for ohmic electrode is evaporated on the overall surface. Furthermore the overall surface of substrate 50 is coated with resist 64 to be exposed. During this exposure, the resist 64 positioned on the undercut part of the second insulating film 58 is shielded with the first insulating film 56 not to be exposed. Resultantly, when the exposed resist part is removed using a solvent, the resist 64 can be brought into the state to be filled in the undercut part only. Through these procedures, a source electrode, a drain electrode and a gate electrode can approach with one another to reduce the source resistance.
申请公布号 JPS63138782(A) 申请公布日期 1988.06.10
申请号 JP19860286151 申请日期 1986.12.01
申请人 SUMITOMO ELECTRIC IND LTD 发明人 OKAZAKI NAOTO;MIYANO NAOYA
分类号 H01L21/28;H01L21/336;H01L21/338;H01L29/78;H01L29/80;H01L29/812 主分类号 H01L21/28
代理机构 代理人
主权项
地址