| 摘要 |
PURPOSE:To improve the data processing speed by performing the collective transmission/reception of data when the word length of the data supplied from a data supply means is equal to that of the data processed by a processing means, then carrying out the transmission/reception of data in plural times when no coincidence exists between both word lengths. CONSTITUTION:When a data processor 52 is applied to the data of N word length, N pieces of registers are prepared together with N pieces of input terminals. In such a case, data DA-DN stored in a memory 50 are outputted in N times to registers RA-RN of the processor 52 to be successively stored there when the data length is equal to the single word length. Then the necessary data processing is carried out to each data through an arithmetic part DC. When the data length is equal to the N word length, the data DA.DN are read out of memories 50A-50N at a time and stored in registors RA-RN. Then the necessary processing is applied to each data through the part DC. In such a way, the data processing speed is increased.
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