| 摘要 |
PURPOSE:To make a peripheral circuit into LSI by consisting of the storage means of a digital audible sound generation circuit with one PROM. CONSTITUTION:The PROM 1 puts the contents of three pieces of storage information of a tone ROM, an inter ROM and an arrange ROM into one and stores it. plural kinds of audible sound signal is stored in a tone address part 1c, plural kinds of intermittent information in an inter address part 1b, and the audible sound signal and deisgnation information which designates the kinds of intermittent information in an arrange address art 1a. Since respective information cannot be read simultaneously, latch circuits 4, 5 and 6 which temporarily hold respective data after they are read are provided. A counter circuit 2 controls high-order addresses in the PROM1, namely, it reads and designates the address parts 1a, 1b and 1c and controls the latch timing of the latch circuits 4, 5 and 6. A selector circuit 3 designates the addresses in respective areas of respective address parts 1A, 1b and 1c.
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