| 摘要 |
PURPOSE:To decrease power supply noise in operation and to quicken the operating speed by connecting one terminal of a current path of a transistor (TR) charging/discharging a load capacitance of an output terminal to one electrode of a capacitor in an output buffer circuit of a semiconductor integrated circuit and connecting it to a power supply or ground potential via a load. CONSTITUTION:Suppose that the load capacitance at the output terminal N1 is 100PF for example, and the capacitance of capacitors C1, C2 is 100PF respectively, then the level of the output terminal N1 is risen or fallen at a high speed to a potential of nearly Vdd/2 by the capacitors C1, C2. Since no large current flows directly from a power supply Vdd to an output terminal or from the output terminal to a ground potential Vss, the potential fluctuation Vdd or Vss is mitigated. Moreover, the ground potential Vss is pulled down by the capacitive coupling of the capacitor C1 attended with the reduction in the potential of the power supply Vdd at the readout of '1'. Since the potential Vdd is boosted up conversely at readout of '0', the effect of other circuit due to power supply noise is almost eliminated. |
