发明名称 |
MICROPROGRAM COMPENSATING CIRCUIT |
摘要 |
PURPOSE:To prevent the subsequent malfunctions by stopping execution of a microprogram of a central processing unit by an interruption signal and at the same time displaying an address preceding by a single access when an access is given to the address of an area storing no microprogram. CONSTITUTION:An interruption control circuit 5 contains plural registers to store plural higher bits, e.g., 3 bits including all addresses storing no microprogram among those addresses to which a central processing unit can give accesses. Then the circuit 5 delivers an interruption signal INT when coincidence is secured among higher 3 bits of an address AD where the unit 1 gives an access to the contents of one of those said registers. The unit 1 stops execution of a microprogram by the signal INT and at the same time displays the address which is preceding by a single access and saved to a stack pointer together with an error code as the error information.
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申请公布号 |
JPS63136145(A) |
申请公布日期 |
1988.06.08 |
申请号 |
JP19860283330 |
申请日期 |
1986.11.27 |
申请人 |
NEC CORP;NIPPON DENKI DATA KIKI KK |
发明人 |
SHIRAKU YUTAKA;KOJIMA YUTAKA |
分类号 |
G06F11/28;G06F9/22;G06F11/30 |
主分类号 |
G06F11/28 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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