| 摘要 |
PURPOSE:To suppress the increase in the type of LSI by using a difference between the delaying value of a delay circuit provided at the outside of the LSI and the value of a basic clock so as to control the overflow value of a refresh counter. CONSTITUTION:In giving a basic clock CLK decided by a device using an LSI1 to an input terminal CLKA and a delay clock to an input terminal CLKB, a detection circuit DET11 compares both clocks and outputs a control signal in response to the difference is outputted to a refresh start signal generating circuit RFG13. Then a refresh counter CNT12 counts up a signal at the terminal DET11 inputted to a terminal CP and sends output bits Q0-Qn corresponding to the count to the RFG13 sequentially. The RFG13 generates a refresh start signal by using the output bits Q0-Qn and a control signal from the DET11 to give an output the signal to an output REF. Thus, the refresh start timing is controlled by having only to change the delaying value in a delay circuit DL2.
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