DMA CONTROLLER

摘要

PURPOSE:To decrease the issuing frequency of transfer commands by operating successively plural index registers while switching said registers and equalizing the number of commands between the reception side and the transmission side. CONSTITUTION:Plural index registers RI1-In are provided to a register file 1 and the contents of the index register designated by a counter a2 are outputted to an address bus 3 and a + or -1 adder 5. The counters a2 and b8 are compared with a maximum column length register 9 and the registers RI1-In are switched at N intervals to secure the coincidence of the number of transfer commands between the reception side and the transmission side.