发明名称 SEQUENCE CONTROLLER
摘要 PURPOSE:To omit the necessity of composed description between sequential processing sequence and instantaneous processing sequence and to reduce manufacturing costs by forcedly rewriting the contents of a common operation output memory to be used for the sequential processing sequence in common every time when an instantaneous processing sequence control part determines the state of an operation output. CONSTITUTION:A sequential processing sequence control part 1 sets up a normal sequential processing sequence in a common operation control output end DO3572. When the instantaneous processing sequence control part 2 sets up an instantaneous processing sequence simultaneously, the operation output state of the sequential processing sequence is stored in an area corresponding to the operation output end DO3572 in the common operation output memory 5 under the normal state. Only when an input logical condition for the instantaneous processing sequence is formed, the output of the output DO3572 are rewritten by the contents determined by the instantaneous processing sequence. Consequently, the contents stored in the memory 5 are transferred to an output buffer 7 in a fixed rapid cycle.
申请公布号 JPS63132304(A) 申请公布日期 1988.06.04
申请号 JP19860276849 申请日期 1986.11.21
申请人 TOSHIBA CORP 发明人 KOJIMA FUMIO
分类号 G05B19/05;G05B19/02 主分类号 G05B19/05
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