| 摘要 |
PURPOSE:To form an input buffer circuit which operates asynchronously and is tolerant to the level variance of a power source and has stable conductance by allowing a differential amplifier which includes a current mirror circuit as a load and an inverter circuit to operate complementarily. CONSTITUTION:The differential amplifier 12 and inverter circuit 13 operate complementarily. The differential amplifier which operates asynchronously is equipped with Q channel type MOS transistors (TR) Q11 and Q12 and N channel type MOS TRs Q13 and Q14; and the sources of the TRs Q11 and Q12 are connected to a power source VCC and the gates of those TRs Q11 and Q12 are connected to each other. The connection point between the TRs Q15 and Q16 which is the output node of the inverter circuit 13 is connected to the output node of the differential amplifier 12. The output signal (a) of an input buffer circuit is therefore the sum of the output of the differential amplifier 12 and the output of the inverter 13. |
