发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT
摘要 PURPOSE:To preclude the malfunction of an input buffer circuit based upon variation in power source potential by detecting the level variation of data outputted from an output buffer circuit and interrupting the fetch of external data to the input buffer circuit. CONSTITUTION:When internal data Dout' varies in level, the voltage VDD or VSS of wiring 15 or 18 varies in potential. At this time, the level variation of the internal data Dout' is detected by a pulse generating circuit 17 and a signal S is inputted to the input buffer 12. The fetching operation of the input buffer 12 for Gin is stopped temporarily by the input of this signal S. The input buffer circuit 12, therefore, never detects the level of the input data Din erroneously to fetch it internally during a period wherein the voltage VDD or VSS of the wiring 15 or 16 varies in level.
申请公布号 JPS63132522(A) 申请公布日期 1988.06.04
申请号 JP19860279944 申请日期 1986.11.25
申请人 TOSHIBA CORP 发明人 IWAHASHI HIROSHI
分类号 H03K5/00;G11C11/409;H03K17/24;H03K19/00;H03K19/0185 主分类号 H03K5/00
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