发明名称 DMA CONTROLLER
摘要 PURPOSE:To obtain the transfer termination prediction signal of a data block at an optional timing by providing a comparator comparing the value of a word counter and a prescribed value. CONSTITUTION:If a DMA transfer start signal 20 is outputted from an action controller, DMA transfer starts. An address counter 11 increments a DMA transfer address 22 whenever one byte is transferred, and the word counter 10 decrements the number of untransferred words 25 whenever one byte is transferred. A comparator 13 outputs the transfer termination prediction signal 26 showing that it is timing for transmitting a transfer termination signal if comparison data given from the action controller and the number of untransferred words 25 are compared and both agree. When the number of untransferred words 25 becomes '0', the word counter 10 outputs the DMA transfer termination signal 27.
申请公布号 JPS63131255(A) 申请公布日期 1988.06.03
申请号 JP19860277235 申请日期 1986.11.20
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 FUJIKAWA WATARU;KAWAKAMI HIDEHIKO;SANNOMIYA KUNIO
分类号 G06F13/28 主分类号 G06F13/28
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