| 摘要 |
PURPOSE:To decrease power consumption by a method wherein no portions face each other of a drain region and source region separated from each other by a channel region positioned between for the realization of a high-speed switching. CONSTITUTION:A U-shape groove is formed in the primary surface of a semiconductor substrate 10 and a drain region 11 and a channel region 13 are provided in the groove. A drain electrode 11, is connected to the drain region 11. A source region 12 is so provided that it may contact a lower edge of the groove and run along the groove, and that no portion thereof will face the drain region 11. The drain region 11 and the source region 12 are equipped with an impurity concentration of approximately 10<18>-10<21>cm<-3>. A gate insulating film 14 that may be an oxide film is formed in contact with the channel region 13, and a gate electrode 14' on the opposite side. In a transistor structured to this design, the drain.source electric field is weaker at a location distant from the gate insulating film 14, which enables a high-speed switching to be accomplished decreasing the power to be consumed.
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