| 摘要 |
A digital phase-lock-loop circuit (20) includes a generator (21) that produces a horizontal rate output signal (CT) at a controlled frequency and a phase detector (202) responsive to the output signal (CT) and to an incoming synchronizing signal (Hs). The phase detector (202) is coupled to the generator control port (21a) via a loop filter (33). When the phase between the output signal (CT) and the synchronizing signal (Hs) that synchronizes the phase-lock-loop circuit (20) changes as a result of, for example, head switching in a two-head VTR that supplies the synchronizing signal, a signal (PH) representative of such phase change is produced. The phase change representative signal (PH) is fed forward to the generator (21) by bypassing (through 120) the loop filter (33) of the phase-lock-loop circuit (20). The phase change representative signal (PH) produces an immediate phase shift of the output signal (CT) such that the loop filter (33) is not affected by the head switching. |
