| 摘要 |
PURPOSE:To enhance the signal-to-noise ratio S/N and to improve the irregularity of a pinch-off voltage Vp sharply by a method wherein a groove whose inner side walls are opposed to each other is formed on a substrate and a gate is formed after an impurity whose conductivity type is different from that of the substrate has been diffused through the inner surface of the groove. CONSTITUTION:A gate region groove 9 is dug down to a prescribed depth by an anisotropic etching method by making use of an oxide film 8 on an N<-> layer 6 of an N-type substrate 10. A P-type impurity whose conductivity type is different from that of the N-type substrate 10 is diffused through the inner surface of the gate region groove 9; a gate diffused layer 1 is formed. A lead wire is extracted to the outside; the gate region groove 9 is buried to eliminate the difference in level; a gate electrode 2 is formed. Then, the oxide film 8 is formed on the surface of this gate electrode 2 in order to prevent a short circuit during a subsequent process. A high-concentration N-type impurity whose conductivity type is the same as that of the N-type substrate 10 is diffused to the region to become a source 3 or ions are implanted; the source 3 is formed and a source electrode 4 is formed.
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