A self-bias circuit is employed for automatically changing the reference voltage of a comparator of an A/D converter of successive approximation type. The self-bias circuit is responsive to a voltage at a summing point where an input analog signal, an offset bias and an output analog signal from a D/A converter are added to each other. The self-bias circuit comprises a resistor and a capacitor so that the capacitor is charged by an average current passing through the resistor connected to the summing point, and the voltage across the capacitor will be used as the reference voltage of the comparator. When the input analog signal amplitude is small, the reference voltage is shifted so that noises superposed on the voltage at the summing point does not cause the comparator to produce an erroneous output signal with which the state of the MSB is undesirably changed. As the amplitude increases, the reference voltage rises for ensuring sufficient dynamic range and symmetrical operation for both positive and negative waves.
申请公布号
DE3221483(C2)
申请公布日期
1988.06.01
申请号
DE19823221483
申请日期
1982.06.07
申请人
VICTOR COMPANY OF JAPAN, LTD., YOKOHAMA, KANAGAWA, JP
