发明名称 MEMORY CIRCUIT
摘要 PURPOSE:To perform a high-speed and stable write operation by supplying the output of an input buffer circuit to an output circuit through an integration circuit in a memory circuit to control a read-out output buffer circuit through the use of the output of the input buffer circuit of a write-in control signal. CONSTITUTION:Buffer circuits B1-B4 and gates G1 and G2 are connected to the circuit 5 of a memory arrat 1, to which an address decoder 2, a word driver 3, Y-address decoder 4 and a digit line selection circuit 5 are connected, in an undermentioned way. Namely, the buffer circuits B2-B4 are used as the input buffer circuits, and the circuit B1 is used for an output buffer circuit, and a pulse generation circuit 6 is interposed between the circuit B3 and the gates G1 and G2. Besides, the circuits B1 and B3 are connected by the integration circuit 10. Thus, the impression timing margin of the write-in control signal is made large.
申请公布号 JPS63127487(A) 申请公布日期 1988.05.31
申请号 JP19870139732 申请日期 1987.06.05
申请人 HITACHI LTD 发明人 HOTTA ATSUO;KATO YUKIO;ISOBE TERUO
分类号 G11C11/414;G11C11/34 主分类号 G11C11/414
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