| 摘要 |
PURPOSE:To improve the hit rate of a cache by using a block whose flag is '1' as an object of replacement at a mis-hit of address read and using a block whose flag is '0' as an object of replacement at mis-hit at data read. CONSTITUTION:In case of address read for the memory access, an output of a replacement block decision circuit 8 is an output of a selection circuit 9 and in case of data read, an output of a replacement block decision circuit 7 is an output of the circuit 9. As a result, a block of a row 3 and a column 2 being a block whose address read flag is '1' is replaced by a replacement control circuit 12 in case of the address read and a block of row 1 and column 2 whose address read flag is '0' is replaced in case of the data read. Then in case of the memory write, it is handled similarly as the address read by replacing a block whose address read flag is '0' even if the data replaced by the write is mis-hit at data write.
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