发明名称 |
Semiconductor memory device with sense amplifiers |
摘要 |
In a dynamic semiconductor memory, bit line pairs and word lines are perpendicular to each other and arranged in a matrix constituted by memory cells. Dummy cells are arranged at intersections between the bit line pairs and a pair of dummy cell word lines. The capacitance of each dummy cell is half that of the memory cell. A pre-sense amplifier and a main sense amplifier are arranged in each pair of bit lines. When data is read out from a selected memory cell, the pre-sense amplifiers are simultaneously activated to perform the pre-sensing operation. However, in the main sensing operation, only one specific main sense amplifier arranged in a certain bit line pair including the bit line connected to the selected memory cell is activated.
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申请公布号 |
US4748596(A) |
申请公布日期 |
1988.05.31 |
申请号 |
US19850792197 |
申请日期 |
1985.10.28 |
申请人 |
KABUSHIKA KAISHA TOSHIBA |
发明人 |
OGURA, MITSUGI;ITOH, YASUO |
分类号 |
G11C11/409;G11C7/06;G11C11/34;G11C11/401;G11C11/4091;(IPC1-7):G11C7/00 |
主分类号 |
G11C11/409 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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