发明名称 SEQUENTIAL DECODER
摘要 PURPOSE:To quicken the decoding processing by using a sub-stack so as to omit the retrieval processing of a node of a maximum metric value and the update processing of the sub-stack when the metric value of a slave node is increased. CONSTITUTION:A stack memory 1 is provided with a depth stack memory 2 storing the depth of a tree structure of the node, a memory 3 storing the internal state of the node, a memory 4 storing the metric value of the node and a stack pointer 5. Then a computer processing section 6 calculates the information of a node having a maximum metric value not expanded read from the memory 1 and the reception code read from the buffer 9 and writes the result to an address corresponding to the node of the memory 1 and processes the node as the node whose metric is maximum when the metric value of the new node is increasing. Moreover, the no update processing is applied to the node whose metric is increased as the result of calculation of the processing section 6 in the substack 7 and only the node whose metric is not increased is subject to processing.
申请公布号 JPS63126325(A) 申请公布日期 1988.05.30
申请号 JP19860271976 申请日期 1986.11.17
申请人 FUJITSU LTD 发明人 YAMASHITA ATSUSHI;UCHIJIMA MAKOTO;KATO TADAYOSHI
分类号 H03M13/23 主分类号 H03M13/23
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