| 摘要 |
PURPOSE:To allow a slave microprocessor (MPU) and a master microprocessor (MPU) having transfer width wider than the data width of the slave MPU to use peripheral devices in common by permitting or inhibiting the transfer of wide data in both the MPUs. CONSTITUTION:The slave MPU 10 converts a wide data transfer permission signal 1 to a wide data transfer inhibiting state. Under said status, a peripheral device interface 30 for the master MPU or a memory 31 for the master MPU is allowed only to transfer narrow width data and matched with the narrow width data transfer to be processed by the slave MPU. Thereby, the slave MPU can use the interface 30 or the memory 31 in addition to a peripheral device interface 20 for the slave MPU or a memory 21 for the slave MPU.
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