发明名称 NXN BIT DOT MATRIX 90×-TURNING CIRCUIT
摘要 PURPOSE:To shorten the processing time of CPU necessary for turning character to a large extent, by writing matrix like dot data of vertical n-dots and horizontal n-dots in a latch circuit from CPU and reading the same from an output buffer circuit n-times to turn the character by 90 deg.. CONSTITUTION:A decoder 1 can access up to 8 circuits by 3-bit address input and one-bit-CE input. A gate circuit 2 selects one of eight input latch circuit 4 on the basis of the data writing signal-WR from CPU. CPU writes row data 8 byte in eight 8-bit latch circuits 4 while altering address. The output terminals of eight latch circuits 4 are connected to the input terminals of eight try state output buffers 5 so as to take the arrangement obtained when the data latched by said latch circuits 4 are turned by 90 deg.. Further, one of the try state output buffers 5 is selected by a gate circuit 3 of the reading signal-RD from CPU and the output of the decoder 1 to output data.
申请公布号 JPS63126762(A) 申请公布日期 1988.05.30
申请号 JP19860271983 申请日期 1986.11.17
申请人 NEC CORP 发明人 UEYAMA HIDEJIRO
分类号 B41J2/485;G06T3/60;G09G1/14;G09G3/00;G09G5/24 主分类号 B41J2/485
代理机构 代理人
主权项
地址