发明名称 MANUFACTURE OF 3-DIMENSIONAL SEMICONDUCTOR INTEGRATED CIRCUIT
摘要 PURPOSE:To increase remarkably the number of circuit elements to be formed, by joining the upper surface of a lower semiconductor single crystal layer and the lower surface of a upper semiconductor single crystal layer in the manner in which the two surfaces contact with each other, and forming the circuit elements on the upper surface side of the upper semiconductor single crystal layer. CONSTITUTION:A circuit element 5 is formed on the upper surface side of a lower semiconductor single crystal layer 1, and a circuit element 5 is formed on the lower surface side of an upper semiconductor single crystal layer 3. Then the upper surface of the lower semiconductor single crystal layer 1 and the lower surface of the upper semiconductor single crystal layer 3 are contacted with each other and joined. On the upper side surface of the joined upper semiconductor single crystal layer 3, a circuit element 5 is formed. The upper surface of the lower semiconductor single crystal layer 1 and the lower surface of the upper semiconductor single crystal layer 3 are usually joined after circuit elements 5 are formed and the surfaces are coated with insulative layers 4. In this case, electrodes of the circuit elements 5 formed on the respective semiconductor single crystal layers are once buried in the insulative layer 4, but they are connected to the upper layer afterwards by making through holes and the like from the upper semiconductor single crystal layer 3.
申请公布号 JPS63126262(A) 申请公布日期 1988.05.30
申请号 JP19860272251 申请日期 1986.11.14
申请人 SHARP CORP 发明人 MATSUNAMI MITSUO;KOBA MASAYOSHI
分类号 H01L27/00;H01L21/31;H01L21/822;H01L21/8234;H01L27/088 主分类号 H01L27/00
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