发明名称 VIDEO SIGNAL PROCESSOR
摘要 PURPOSE:To execute non-linear preemphasis and a non-linear deemphasis of a reverse characteristic thereto by making the input and output characteristics of first and second non-linear input and output circuits different at the time of recording and reproducing. CONSTITUTION:An input video signal is delayed by one sampling period in a delay circuit 2 and subtracts from an input signal in an arithmetic circuit. Switches 6, 11 are controlled by a recording and reproducing switching signal 14, at the time of recording, the output of an adder circuit 4 is delayed by one sampling period in a delay circuit 5 through the non-linear input and output circuit 7, fed back to the adder circuit 4, added to the input signal in an adder circuit 12 through the non-linear input and output circuit 9 and outputted. At the time of reproducing, in place of the non-linear input and output circuits 7, 9, the non-linear input and output circuits 8, 10 are used. At the time of recording and reproducing, the input and output characteristics of the first and the second non-linear input and output circuits 7, 9 and 8, 10 are changed, thereby, they are operated as the non-linear preemphasis and as the non-linear deemphasis of the completely reverse characteristic thereto.
申请公布号 JPS63125070(A) 申请公布日期 1988.05.28
申请号 JP19860272498 申请日期 1986.11.14
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 OTA HARUO
分类号 H04N5/922;H04N5/92 主分类号 H04N5/922
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