| 摘要 |
PURPOSE:To decrease the parasitic capacitance of the source and the drain of a MOS transistor without impairing the improving method of a short channel effect, by making the impurity concentration in a region directly beneath the gate of the MOS transistor on the side of a substrate higher than that in other region. CONSTITUTION:The parasitic capacitance of a part other than a side surface part, where source and drain regions 2 and 7 are in contact with high concentration impurity regions 5 and 10, is determined with the impurity concentrations of semiconductor substrate 1 and 6. Therefore, the parasitic capacitance in the source and drain regions can be reduced in the low concentration semiconductor substrate 1 and 6. Since the high concentration impurity regions 5 and 10 are formed directly beneath gate electrodes 4 and 9, the threshold length of a gate, where punch through occurs between the source and the drain due to a short channel effect, can be shortened.
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