发明名称 INTEGRATED CIRCUIT TESTER
摘要 PURPOSE:To detect a troubled position efficiently by a method wherein signal transmission routes and branch nodes are successively called out from a route information file and an X-Y stage is shifted in accordance with wiring coordinates to measure a logical value. CONSTITUTION:A scanning circuit 13 is operated for every test pattern to perform raster scanning of an electron beam 21. A wiring logical value reading circuit 12 binarize potential contrast signals which is detected by a secondary electron detector 24 synchronously with the scanning and the logical values of the respective sampled points are obtained. Those measured logical values are transferred to a control computer 1. In order to detect a troubled position, an X-Y stage 22 is shifted by an X-Y stage control circuit 14 under the control by the computer 1 and the test program in accordance with node identification data, wiring coordinate data and the route information in a design data file 7. The test pattern data is applied to a device 10 to be tested and the beam 21 is applied. The troubled position can be detected by comparing the obtained measured logical value with the logical expected value in the file 7.
申请公布号 JPS63124438(A) 申请公布日期 1988.05.27
申请号 JP19860270084 申请日期 1986.11.13
申请人 NIPPON TELEGR & TELEPH CORP <NTT> 发明人 TAMAMA AKIO;KUJI NORIO
分类号 H01L21/66;G01R31/28;G01R31/302;H01J37/28 主分类号 H01L21/66
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