| 摘要 |
PURPOSE:To obtain a desired processor internal phenomenon detecting/informing function by using a detecting/informing means for occurrence of the debug/trace phenomena and a continuance/interruption control means for operations of an FF and a processor. CONSTITUTION:When a phenomenon is set, a setting signal is applied to an address setting signal terminal 8 after application of an instruction address to be informed to a set address terminal 7. Thus a detected address register 3 is set. While a mode FF 9 is set when a processor must interrupt the processing via a mode setting terminal 10 with occurrence of a phenomenon. Then the FF 9 is reset when the processor must continue the processing. When an address that is designated while the processor is executing a program is set at an instruction address register 2, i.e., the execution is detected for instruction of the designated address, the designated address is delivered to a phenomenon detecting terminal 5 of the processor via a waveform shaping circuit 4 and at the same time a control FF 11 is set. Thus the execution of instructions is discontinued until the FF 11 is reset in a debug mode. While the execution of instructions is continued in a trace mode and occurrence of a phenomenon is outputted through the terminal 5.
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