| 摘要 |
PURPOSE:To reduce steps that a CPU controls for reading data and to shorten processing time by permitting hardware such as a register, a selector and a gate to execute operations when a pointer is read out of a memory. CONSTITUTION:While a signal P is outputted, a signal 60 showing whether accessed data in the memory 1 is the pointer or not becomes 'H'. Only if the signal 60 becomes 'H' during a period from t1-t3, an address/data decision circuit 6 outputs signals 61-64. The initial pulse of the signal 64 prompts a signal on a data bus 3 to be written in the register 7. While the signal 62 is 'H', a signal 22 being an output from the register 7 is inputted as a signal 23 to the memory 1, and a signal D is outputted as a signal s3 to the data bus 3 from the memory. By the 2nd pulse of the signal 64, the signal D on the data bus is written in the register 7. The hardware can execute the operations that a program control executes conventionally, whereby the control steps for processing can be reduced and the processing time is shortened.
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