发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
摘要 PURPOSE:To reduce the creeping phenomenon of a low-concentration region into a channel region, to prevent a short-channel effect and to enhance the characteristic by a method wherein the low-concentration region on the side of the channel region of a drain is formed by impurities of a small diffusion-coefficient. CONSTITUTION:An N-channel MISFET acting as a memory cell is composed of the following: a gate-insulating film 9 composed of a silicon oxide film formed by the thermal oxidation of the surface exposed from a field insulating film 7 of a semiconductor substrate 1; a gate electrode 10 which is composed of a polycrystalline silicon film formed, e.g., by a CVD method and is constructed by laminating a refractory metal film of, e.g., Mo, W, Ta, Ti or the like or a silicide film of this metal on it; an n-type semiconductor region (low-concentration region) 11 constituting the side of a channel region of a source-drain region; an n<+> type semiconductor region (high- concentration region) 12 constituting the part which is separated from the channel region. The n-type semiconductor region 11 is composed of n-type impurities of a small diffusion-coefficient, e.g., arsenic (As), and its dose quantity is set at about 1X10<13> atoms/cm<2>. By using the arsenic, a creeping phenomenon under the gate electrode is reduced so that a short-channel effect can prevented.
申请公布号 JPS63122163(A) 申请公布日期 1988.05.26
申请号 JP19860267533 申请日期 1986.11.12
申请人 HITACHI LTD 发明人 SHIBATA TAKASHI;UCHIDA KEN;TAKEDA TOSHIFUMI;MATSUMOTO YOICHI
分类号 H01L29/78;H01L21/8246;H01L27/112 主分类号 H01L29/78
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