发明名称
摘要 PURPOSE:To prevent the generation of information inversion by a method wherein one side of capacity between the collector substrates of each transistor forming the FF of a memory cell and capacity between collector bases is made larger than the corresponding capacity of a transistor of a peripheral circuit. CONSTITUTION:Holes are opened to an oxide film on a P-type substrate, a P<+>-layer is formed to one hole, and N<+> diffusion layers 36, 37 are made up to both holes. The oxide film is removed, an N<-> epitaxial layer is built up, the epitaxial layer is separated by an oxide film 39, and a P<+> channel stopper 40 is formed to the lower portion. N<+> Collector extracting layers 41, 42, P-type bases 43, 44 and N<+>-type emitters 45, 46 are selectively made up. The whole is coated with PSG, holes are selectively opened, and electrodes are formed. Thus, the base 44 and the collector extracting layer 42 are contacted and junction capacitance is increased in a memory transistor, and contact between the collector extracting layer 41 and the base 43 is prevented and the increase of junction capacitance is suppressed in a transistor of a peripheral circuit. According to this constitution, the junction capacitance C1-C3 of a memory increases, and the generation of information inversion by natural radiation, the inversion of the potential of collectors, is prevented.
申请公布号 JPS6325715(B2) 申请公布日期 1988.05.26
申请号 JP19790066192 申请日期 1979.05.30
申请人 CHO ERU ESU AI GIJUTSU KENKYU KUMIAI 发明人 SHIBA TAKEO;OGIUE KATSUMI
分类号 G11C11/411;H01L21/331;H01L21/822;H01L21/8229;H01L27/04;H01L27/102;H01L29/73 主分类号 G11C11/411
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