| 摘要 |
PURPOSE:To stabilize a synchronization by making a response faster by delaying a horizontal synchronizing signal to artificially generate a synchronizing signal during one horizontal scanning period and applying a PLL by the use of this signal. CONSTITUTION:A horizontal synchronizing pulse Hsync passes 1/4 H delay circuits 2-4, respectively delayed by 1/4H-3/4H and inputted to a synthesizing circuit 5 constituted of an AND circuit. A signal synthesized in the synthesizing circuit 5 is inputted to a PLL circuit constituted of a phase detecting circuit 6, a low-pass filter 7, a voltage controlled oscillator 8, and an oscillator 9. Thereby, when the horizontal synchronization is deviated, the PLL circuit can be locked at a rapid speed. |
