| 摘要 |
<p>A multinode parallel-processing computer comprises a plurality of interconnected, large capacity nodes (12) each including a reconfigurable pipeline of functional units such as Integer Arithmetic Logic Processors, Floating Point Arithmetic Processors, Special Purpose Processors, etc.. The reconfigurable pipeline of each node (12) is connected to a multiplane memory (28) by a Memory-Alu Switch NETwork (MASNET) (26). The reconfigurable pipeline conveniently includes three basic substructures formed from functional units which have been found to be sufficient to perform the bulk of all calculations. The MASNET (26) controls the flow of signals from the memory planes (30) to the reconfigurable pipeline (24) and vice versa. The nodes (12) are connectable together by an internode data router (Hyperspace router) so as to form a hypercube configuration. The capability of the nodes (12) to conditionally reconfigure the pipeline (24) at each tick of the clock, without requiring a pipeline flush, permits many powerful algorithms to be implemented directly.</p> |
